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DTSTART;TZID="Pacific Time (US & Canada)":20260421T131000
DTEND;TZID="Pacific Time (US & Canada)":20260421T140000
SUMMARY:CySER Virtual Seminar &#8211; Hardware IP Protection &amp; Reliability Solutions in a Fully Transparent World
LOCATION:Online
DESCRIPTION:Title: Hardware IP Protection &amp; Reliability Solutions in a Fully Transparent World\n\nSpeaker: Dr. Leon Li, Assistant Professor, Washington State University\n\nAbstract: Modern integrated circuits are developed across a global supply chain, which improves efficiency but also exposes designs to risks such as reverse engineering and IP theft. A common defense is logic locking, which protects hardware by embedding secret keys into the circuit. However, many of these approaches rely on assumptions that do not hold in practice. When an attacker can fully observe, access, and even tamper with the design, these hidden keys often leave exploitable structural and functional traces. In this talk, I will revisit the assumptions behind existing hardware security techniques and explain why they remain vulnerable under realistic attack models. I will then introduce an alternative protection framework that shifts the focus from protecting static secrets to leveraging the circuit’s execution over time. In this framework, keys are not fixed, but are derived and continuously updated based on internal execution history, making correct functionality dependent on valid execution trajectories rather than a single hidden value. This perspective fundamentally elevates the complexity of reverse engineering, even in a fully transparent attack environment. Finally, I will briefly discuss how the same temporal mechanisms provide a unified basis for enhancing circuit reliability.\n\nBiography: Leon Li is an assistant professor in the School of Electrical Engineering and Computer Science at Washington State University, where he joined in 2026. He received his Ph.D., M.S., and B.S. in Computer Science and Engineering from the University of California, San Diego, in 2025, 2023, and 2019, respectively. His research spans testing, hardware security, and reliability, with a focus on logic locking and resilient obfuscation of sequential systems. His work has been recognized by IEEE Top Picks in Test and Reliability, multiple best presentation awards, and top placements in CSAW security competitions.
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