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Friday, December 2 @11 am
High-Performance and Reliable Processing-in-Memory Accelerators for Graph-based Machine Learning by Chukwufumnanya Ogbogu – Preliminary Exam
Workshop / Seminar
WSU Pullman - Electrical and Mechanical Engineering Building

The saturating scaling trends of CMOS technology have motivated the exploration of emerging Process-in-Memory (PIM) architectures as a promising alternative for accelerating data intensive Machine Learning (ML) workloads. To that effect, researchers have explored special-purpose accelerators based on Non-volatile Memory (NVM) crossbar primitives such as Resistive Random Access Memory (ReRAM)-based PIM accelerators.