Engineering

Speaker: Cory Justin Baker Cybercore Integration Center, Idaho National Laboratory

Title: Cybersecurity for the Operational Technology Environment

Abstract: The Cybersecurity for the Operational Technology Environment (CyOTE) program, funded by Department of Energy, Office of Cybersecurity, Energy Security and Emergency Response (CESER), works with energy sector partners and the…

Emerging and next-generation supercomputers have nodes that are becoming more powerful and complex, with a set of hosts, e.g., CPUs, and a set of devices, e.g., GPUs, on their nodes. During an application’s execution on such a supercomputer, load imbalances occurring within a node – induced by the application or induced by system noise and other complexities of the node’s hardware – slow down the application’s execution significantly.

Transient faults are becoming a significant concern for emerging extreme-scale high performance computing (HPC) systems. This nascent problem is exacerbated by technology trends toward smaller transistor size, higher circuit density and the use of near-threshold voltage techniques to save power. They could corrupt the execution of long-running scientific applications by leading to either SDCs (incorrect values in outputs) or soft failures (abnormal termination, e.g., process crashes).

This two week-long workshop will feature presentations by cybersecurity experts, research presentations, industry best practices, hands-on tutorials, a student poster session, networking opportunities, field trips to Schweitzer Engineering Laboratory and Keyport Naval Undersea Warfare Center, optional picnic on Memorial Day, food, and fun.