EECS Colloquium: Efficient resilience in processor design – from cloud servers to connected cars by Karthik V. Swaminathan, IBM Research
About the event
Abstract
From autonomous vehicles to hybrid cloud and mainframe systems, Reliability, Availability and Serviceability (RAS) is fast becoming a first-class consideration alongside performance and energy-optimal execution in the design and functioning of the constituent processors. This has resulted in an increased push towards Efficient Resilience as the predominant design paradigm for these processors. In this talk, he shall explore methodologies and techniques for realizing Efficient Resilience, with a focus on key hardware enablers for accelerating AI applications. He will examine these different technologies in the context of key processors such as the AI-infused IBM POWER10, as well as SoCs targeted at cloud-backed edge applications.
Bio
Karthik is a research staff member at the Efficient and Resilient Systems Group at the IBM T.J Watson Research Center. His research has a broad, cross-layer scope examining circuit, architecture and application level optimizations for improving the reliability and energy efficiency of multi core systems and accelerators. He has also worked on characterizing performance and reliability of IBM server-class and mainframe processors at various stages of design.
Karthik graduated with a Ph.D from the Computer Science and Engineering Department at the Pennsylvania State University, University Park, PA in 2014. His thesis work was focused on realizing energy-efficient architectures using emerging transistor technologies. He was awarded the IBM Ph.D Fellowship for the 2012-2013 academic year. He was elected to the ACM SIGMICRO Executive Committee in 2020.
Karthik graduated with Bachelors and Masters degrees in Electrical Engineering from the Indian Institute of Technology (IIT) Madras in 2008. Prior to starting his Ph.D, he also worked in IBM Research India (New Delhi) from 2008-2009, as part of the High Performance Computing Group.